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RC5061
High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms
Features
* Programmable output for Vcore from 1.3V to 3.5V using an integrated 5-bit DAC * Controls adjustable linears for Vtt (1.5V), and Vclock (2.5V) * Meets VRM specification with as few as 5 capacitors * Meets 1.550V +40/-70mV over initial tolerance, temperature and transients * * * * * * * Remote sense Active Droop (Voltage Positioning) Drives N-Channel MOSFETs Overcurrent protection using MOSFET sensing 85% efficiency typical at full load Integrated Power Good and Enable/Soft Start functions 20 pin SOIC package
Applications
* * * * Power supply for Pentium(R) III Camino Platform Power supply for Pentium III Whitney Platform VRM for Pentium III processor Programmable multi-output power supply
Description
The RC5061 is a synchronous mode DC-DC controller IC which provides a highly accurate, programmable set of output voltages for multi-voltage platforms such as the Intel Camino, and provides a complete solution for the Intel Whitney and other high-performance processors. The RC5061 features remote voltage sensing, independently adjustable current limit, and Active Droop for optimal converter transient response. The RC5061 uses a 5-bit D/A converter to program the output voltage from 1.3V to 3.5V. The RC5061 uses a high level of integration to deliver load currents in excess of 16A from a 5V
Block Diagram
+3.3V 9 10 VCCP 11 + + +5V VCCA 17 REF PWRGD, OCL OCL REF +12V PWRGD, OCL OSC + + 15 RS 16 20 VCCP 1 HIDRV +5V
+1.5V
12 +2.5V
+
+
Digital Control
2
VCC
19 LODRV 18 GNDP
5-Bit DAC 8765 4 VID0 VID2 VID4 VID1 VID3
1.24V Reference 3 GNDA 13 ENABLE/SS
Power Good
14
PWRGD
Pentium is a registered trademark of Intel Corporation.
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RC5061
PRODUCT SPECIFICATION
source with minimal external circuitry. Synchronous-mode operation offers optimum efficiency over the entire specified output voltage range. An on-board precision low TC reference achieves tight tolerance voltage regulation without expensive external components, while Active Droop permits exact tailoring of voltage for the most demanding load transients. The RC5061 includes linear regulator controllers for Vtt termination (1.5V), and Vclock (2.5V), each adjustable with an external divider. The RC5061 also offers integrated functions including Power Good, Output Enable/Soft Start and current limiting, and is available in a 20 pin SOIC package.
Pin Assignments
HIDRV SW GNDA VID4 VID3 VID2 VID1 VID0 VTTGATE VTTFB 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCCP LODRV GNDP VCCA VFB IFB PWRGD SS/ENABLE VCKFB VCKGATE
RC5061
Pin Definitions
Pin Number Pin Name 1 2 3 4-8 HIDRV SW GNDA VID0-4 Pin Function Description High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel MOSFET. The trace from this pin to the MOSFET gate should be <0.5". High side Driver Source and Low side Driver Drain Switching Node. Together with IFB pin allows FET sensing for Vcc current. Analog Ground. Return path for low power analog circuitry. This pin should be connected to a low impedance system ground plane to minimize ground loops. Voltage Identification Code Inputs. These open collector/TTL compatible inputs will program the output voltage over the ranges specified in Table 2. Pull-up resistors are internal to the controller. Gate Driver for VTT Transistor. For 1.5V output. Voltage Feedback for VTT. Gate Driver for VCK Transistor. For 2.5V output. Voltage Feedback for VCK. Output Enable. A logic LOW on this pin will disable all outputs. An internal current source allows for open collector control. This pin also doubles as soft start for all outputs. Power Good Flag. An open collector output that will be logic LOW if any output voltage is not within 12% of the nominal output voltage setpoint. Vcc Current Feedback. Pin 15 is used in conjunction with pin 2 as the input for the Vcc current feedback control loop. Layout of these traces is critical to system performance. See Application Information for details. Vcc Voltage Feedback. Pin 16 is used as the input for the Vcc voltage feedback control loop. See Application Information for details regarding correct layout. Analog VCC. Connect to system 5V supply and decouple with a 0.1F ceramic capacitor. Power Ground. Return pin for high currents flowing in pin 20 (VCCP). Vcc Low Side FET Driver. Connect this pin through a resistor to the gate of an N-channel MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should be <0.5". Power VCC. For all FET drivers. Connect to system 12V supply through a 33, and decouple with a 1F ceramic capacitor.
9 10 11 12 13 14 15
VTTGATE VTTFB VCKGATE VCKFB ENABLE/SS PWRGD IFB
16 17 18 19
VFB VCCA GNDP LODRV
20
VCCP
2
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PRODUCT SPECIFICATION
RC5061
Absolute Maximum Ratings
Supply Voltage VCCA to GND Supply Voltage VCCP to GND Voltage Identification Code Inputs, VID0-VID4 All Other Pins Junction Temperature, TJ Storage Temperature Lead Soldering Temperature, 10 seconds Thermal Resistance Junction-to-ambient, JA1
Note: 1. Component mounted on demo board in free air.
13.5V 15V VCCA 13.5V 150C -65 to 150C 300C 75C/W
Recommended Operating Conditions
Parameter Supply Voltage VCCA Input Logic HIGH Input Logic LOW Ambient Operating Temperature Output Driver Supply, VCCP 0 10.8 12 Conditions Min. 4.5 2.0 0.8 70 13.2 Typ. 5 Max. 5.25 Units V V V C V
Electrical Specifications
(VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25C using circuit in Figure 1 unless otherwise noted.) The * denotes specifications which apply over the full operating temperature range. Parameter VCC Regulator Output Voltage Output Current Initial Voltage Setpoint ILOAD = 0.8A, VOUT = 2.400V VOUT = 2.000V VOUT = 1.550V TA = 0 to 70C, VOUT = 2.000V VOUT = 1.550V VIN = 4.75V to 5.25V ILOAD = 0.8A to 12.5A 20MHz BW, ILOAD = 18A VOUT = 2.000V VOUT = 1.550V3 ILOAD = 0.8A to 18A, VOUT = 2.000V VOUT = 1.550V3 ILOAD = 18A, VOUT = 2.0V See Figure 3 See Figure 3 * * * * * 1.940 1.480 1.900 1.480 45 50 85 50 50 * * * 13.0 2.397 2.000 1.550 See Table 1 * 1.3 18 2.424 2.020 1.565 +8 +6 -4 14.4 60 11 2.070 1.590 2.100 1.590 60 15.8 2.454 2.040 1.580 3.5 V A V V V mV mV mV/V K mV mVpk V V A % nsec nsec
3
Conditions
Min.
Typ.
Max.
Units
Output Temperature Drift Line Regulation Internal Droop Impedance Maximum Droop Output Ripple Total Output Variation, Steady State1 Total Output Variation, Transient2 Short Circuit Detect Current Efficiency Output Driver Rise & Fall Time Output Driver Deadtime
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RC5061
PRODUCT SPECIFICATION
Electrical Specifications (Continued) (VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25C using circuit in Figure 1 unless otherwise noted.) The * denotes specifications which apply over the full operating temperature range.
Parameter Duty Cycle 5V UVLO 12V UVLO Soft Start Current VTT Linear Regulator Output Voltage Under Voltage Trip Level VCLK Linear Regulator Output Voltage Under Voltage Trip Level Common Functions Oscillator Frequency PWRGD Threshold Linear Regulator Under Voltage Delay Time Logic HIGH, All Outputs Logic LOW, Any Output Over Current * * * 255 92 88 30 310 345 108 112 kHz %VOUT sec ILOAD 2A Over Current * 2.375 2.5 80 2.625 V %VO ILOAD 2A Over Current * 1.455 1.5 80 1.545 V %VO * * * Conditions Min. 0 3.74 7.65 5 4 8.5 10 Typ. Max. 100 4.26 9.35 17 Units % V V A
Notes: 1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is measured at the converter's VFB sense point. 2. As measured at the converter's VFB sense point. For motherboard applications, the PCB layout should exhibit no more than 0.5m trace resistance between the converter's output capacitors and the CPU. Remote sensing should be used for optimal performance. 3. Using the VFB pin for remote sensing of the converter's output at the load, the converter will be in compliance with Intel's VRM 8.4 specification of +50, -80mV. If Intel specifications on maximum plane resistance from the converter's output capacitors to the CPU are met, the specification of +40, -70mV at the capacitors will also be met.
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PRODUCT SPECIFICATION
RC5061
Table 1. Output Voltage Programming Codes
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Nominal VOUT 1.30V 1.35V 1.40V 1.45V 1.50V 1.55V 1.60V 1.65V 1.70V 1.75V 1.80V 1.85V 1.90V 1.95V 2.00V 2.05V 2.0V 2.1V 2.2V 2.3V 2.4V 2.5V 2.6V 2.7V 2.8V 2.9V 3.0V 3.1V 3.2V 3.3V 3.4V 3.5V
Note: 1. 0 = processor pin is tied to GND. 1 = processor pin is open.
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RC5061
PRODUCT SPECIFICATION
Typical Operating Characteristics
(VCCA = 5V, VCCP = 12V, and TA = +25C using circuits in Figure 1, unless otherwise noted.)
VCPU Efficiency vs. Output Current 2.04 88 86 84 82 80 78 76 74 72 70 68 66 64 0 3 VOUT = 2.000V 2.03 2.02 2.01 2.00
VOUT (V)
Droop, VCPU = 2.0V, RD = 8K
Efficiency (%)
VOUT = 1.550V
1.99 1.98 1.97 1.96 1.95 1.94 0 3 6 9 12 15 18 Output Current (A)
6 9 12 Output Current (A)
15
18
CPU Output Voltage vs. Output Current 3.5 3.0 2.5
VOUT (V)
2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 Output Current (A)
Output Programming, VID4 = 0 2.1 1.9 1.7 1.5 1.3 1.1 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00 DAC Setpoint 3.5 3.0 2.5 2.0 1.5 1.0
Output Programming, VID4 = 1
VCPU(V)
VCPU(V)
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2. 3.3 3.4 3.5 DAC Setpoint
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PRODUCT SPECIFICATION
RC5061
Typical Operating Characteristics (continued)
Output Ripple, 2.0V @ 18A Transient Response, 12.5A to 0.5A
VCPU (20mV/div)
VCPU (50mV/div)
1.590V 1.550V 1.480V
Time (1s/div)
Time (100s/div)
Transient Response, 0.5A to 12.5A
Switching Waveforms, 18A Load
5V/div
VCPU (50mV/div)
1.590V 1.550V 1.480V 5V/div
HIDRV pin
LODRV pin
Time (1s/div) Time (100s/div)
Output Startup, System Power-up VCPU (1V/div) ENABLE (2V/div)
Output Startup from Enable
VCPU (1V/div)
VIN (2V/div)
Time (10ms/div)
Time (10ms/div)
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RC5061
PRODUCT SPECIFICATION
Typical Operating Characteristics (continued)
Linear Regulator Noise
2.042 2.040 2.038 VCPU (V) 2.036 2.034 2.030 2.028 2.026 0 25 70 100
Time (100s/div) AC COUPLED VOUT (10mV/div)
Temperature (C)
Application Circuit
L1 (Optional) +5V CIN*
R6
C1
R7 C2
L2 VO COUT* D1 3.3V IN Q3 C10 1.5V C8
Q1
R2
1 2 3 VID4 VID3 VID2 VID1 VID0 4 5 6 7 8 9 10 U1 RC5061
Q2
R3
20 19 18 17 16 15 14 13 12 11
R1 +12V C5 VCC R4 PWRGD ENABLE/SS Q4 C11 C4 C6
C3
2.5V C9 * Refer to Appendix for values of COUT, CIN and R7. Adjustable with an external divider.
Figure 1. Typical Application Circuit (Worst Case Analyzed! See Appendix for Details)
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PRODUCT SPECIFICATION
RC5061
Table 2. RC5061 Application Bill of Materials
(Components based on Worst Case Analysis--See Appendix for Details) Reference C1 C2, C5 C3-4,C6 C8-9 C10-11 CIN COUT D1 L1 L2 Q1 Q2 Q3-4 R1 R2-3 R4 R6 R7 U1 Manufacturer Part # AVX TAJB475M010R5 Panasonic ECU-V1C105ZFX Panasonic ECU-V1H104ZFX Sanyo 6MV1000FA Any Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola MBRD835L Any Any Fairchild FDB6030L Fairchild FDB7030BL Fairchild FDB4030L Any Any Any Any Any Fairchild RC5061M Quantity 1 2 3 2 2 * * 1 Optional 1 1 1 2 1 2 1 1 1 1 Description 4.7F, 10V Capacitor 1F, 16V Capacitor 100nF, 50V Capacitor 1000F, 6.3V Electrolytic 22F, 6.3V Capacitor 1200F, 10V Electrolytic 1500F, 6.3V Electrolytic 8A Schottky Diode 2.5H, 8A Inductor 1.3H, 20A Inductor N-Channel MOSFET N-Channel MOSFET N-Channel MOSFET 33 4.7 10K 10 * DC/DC Controller DCR ~ 10m See Note 1. DCR ~ 2m RDS(ON) = 20m @ VGS = 4.5V See Note 2. RDS(ON) = 10m @ VGS = 4.5V See Note 2. Low ESR IRMS = 2A ESR 44m Requirements/Comments
Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired. 2. For 17.4A designs using the TO-220 MOSFETs, heatsinks with thermal resistance SA < 20C/W should be used. For designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletins AB-8 and AB-15. *Refer to Appendix for values.
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RC5061
PRODUCT SPECIFICATION
L1 (Optional) +5V CIN*
R6
C1
C2 Q1 R7 R10 1 2 3 R3 VID4 VID3 VID2 VID1 VID0 4 5 6 7 8 9 10 U1 RC5061 20 19 18 17 16 15 14 13 12 11 R1 +12V C5 VCC R4 PWRGD ENABLE/SS C4 Q5 C11 C6 R2
R8 VO COUT*
L2
Q2 D1 3.3V IN Q3
C3
C10 1.5V C8
2.5V C9 *Refer to Table 3 for values of COUT and CIN. Adjustable with an external divider.
Figure 2. Application Circuit for Coppermine/Camino Motherboards (Typical Design)
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PRODUCT SPECIFICATION
RC5061
Table 3. RC5061 Application Bill of Materials for Intel Coppermine/Camino Motherboards
(Typical Design) Reference C1 C2, C5 C3-4,C6 C8-9 C10-11 CIN COUT D1 L1 L2 Q1 Q2 Q3-4 R1 R2-3 R4 R6 R7 R8 U1 Manufacturer Part # AVX TAJB475M010R5 Panasonic ECU-V1C105ZFX Panasonic ECU-V1H104ZFX Sanyo 6MV1000FA Any Sanyo 10MV1200GX Sanyo 6MV1500GX Motorola MBRD835L Any Any Fairchild FDB6030L Fairchild FDB7030BL Fairchild FDB4030L Any Any Any Any Any N/A Fairchild RC5061M Quantity 1 2 3 2 2 3 12 1 Optional 1 1 1 2 1 2 1 1 1 1 1 Description 4.7F, 10V Capacitor 1F, 16V Capacitor 100nF, 50V Capacitor 1000F, 6.3V Electrolytic 22F, 6.3V Capacitor 1200F, 10V Electrolytic 1500F, 6.3V Electrolytic 8A Schottky Diode 2.5H, 5A Inductor 1.3H, 15A Inductor N-Channel MOSFET N-Channel MOSFET N-Channel MOSFET 33 4.7 10K 10 6.24K 30m DC/DC Controller PCB Trace Resistor DCR ~ 10m See Note 1. DCR ~ 3m RDS(ON) = 20m @ VGS = 4.5V See Note 2. RDS(ON) = 10m @ VGS = 4.5V See Note 2. Low ESR IRMS = 2A ESR 44m Requirements/Comments
Notes: 1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply with Intel dI/dt requirements. L1 may be omitted if desired. 2. For 12.5A designs using the TO-220 MOSFETs, heatsinks with thermal resistance SA < 20C/W should be used. For designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections, refer to Applications Bulletins AB-8 and AB-15.
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RC5061
PRODUCT SPECIFICATION
Test Parameters
tR 5V 2V t DT 2V 5V 2V tDT LODRV tF HIDRV to SW
High Current Output Drivers
The RC5061 contains two identical high current output drivers that utilize high speed bipolar transistors in a push-pull configuration. The drivers' power and ground are separated from the chip's power and ground for switching noise immunity. The power supply pin, VCCP, is supplied from an external 12V source through a series 33 resistor. The resulting voltage is sufficient to provide the gate to source drive to the external MOSFETs required in order to achieve a low RDS,ON.
2V
Figure 3. Ouput Drive Timing Diagram
Internal Voltage Reference
The reference included in the RC5061 is a precision band-gap voltage reference. Its internal resistors are precisely trimmed to provide a near zero temperature coefficient (TC). Based on the reference is the output from an integrated 5-bit DAC. The DAC monitors the 5 voltage identification pins, VID0-4. When the VID4 pin is at logic HIGH, the DAC scales the reference voltage from 2.0V to 3.5V in 100mV increments. When VID4 is pulled LOW, the DAC scales the reference from 1.30V to 2.05V in 50mV increments. All VID codes are available, including those below 1.80V.
Application Information
The RC5061 Controller
The RC5061 is a programmable synchronous DC-DC controller IC. When designed around the appropriate external components, the RC5061 can be configured to deliver more than 16A of output current, as appropriate for the Katmai and Coppermine and other processors. The RC5061 functions as a fixed frequency PWM step down regulator.
Main Control Loop
Refer to the RC5061 Block Diagram on page 1. The RC5061 implements "summing mode control", which is different from both classical voltage-mode and current-mode control. It provides superior performance to either by allowing a large converter bandwidth over a wide range of output loads. The control loop of the regulator contains two main sections: the analog control block and the digital control block. The analog section consists of signal conditioning amplifiers feeding into a comparator which provides the input to the digital control block. The signal conditioning section accepts input from the DROOP (current feedback) and VFB (voltage feedback) pins and sets up two controlling signal paths. The first, the voltage control path, amplifies the difference between the VFB signal and the reference voltage from the DAC and presents the output to one of the summing amplifier inputs. The second, current control path, takes the difference between the DROOP and SW pins when the high-side MOSFET is on, reproducing the voltage across the MOSFET and thus the input current; it presents the resulting signal to another input of the summing amplifier. These two signals are then summed together. This output is then presented to a comparator looking at the oscillator ramp, which provides the main PWM control signal to the digital control block. The digital control block takes the analog comparator input and the main clock signal from the oscillator to provide the appropriate pulses to the HIDRV and LODRV output pins. These two outputs control the external power MOSFETs. There is an additional comparator in the analog control section whose function is to set the point at which the RC5061 current limit comparator disables the output drive signals to the external power MOSFETs.
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Power Good (PWRGD)
The RC5061 Power Good function is designed in accordance with the Pentium III DC-DC converter specifications and provides a continuous voltage monitor on the VFB pin. The circuit compares the VFB signal to the VREF voltage and outputs an active-low interrupt signal to the CPU should the power supply voltage deviate more than 12% of its nominal setpoint. The Power Good flag provides no other control function to the RC5061.
Output Enable/Soft Start (ENABLE/SS)
The RC5061 will accept an open collector/TTL signal for controlling the output voltage. The low state disables the output voltage. When disabled, the PWRGD output is in the low state. Even if an enable is not required in the circuit, this pin should have attached a capacitor (typically 100nF) to softstart the switching. A larger value may occasionally be required if the converter has a very large capacitor at its output.
Over-Voltage Protection
The RC5061 constantly monitors the output voltage for protection against over-voltage conditions. If the voltage at the VFB pin exceeds the selected program voltage, an over-voltage condition is assumed and the RC5061 disables the output drive signal to the external high-side MOSFET. The DC-DC converter returns to normal operation after the output voltage returns to normal levels.
Oscillator
The RC5061 oscillator section uses a fixed frequency of operation of 300KHz.
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PRODUCT SPECIFICATION
RC5061
Design Considerations and Component Selection
Additional information on design and component selection may be found in Fairchild's Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhancement Mode Field Effect Transistors. Desired characteristics are as follows: * Low Static Drain-Source On-Resistance, RDS,ON < 20m (lower is better) * Low gate drive voltage, VGS = 4.5V rated * Power package with low Thermal Resistance * Drain-Source voltage rating > 15V. The on-resistance (RDS,ON) is the primary parameter for MOSFET selection. The on-resistance determines the power dissipation within the MOSFET and therefore significantly affects the efficiency of the DC-DC Converter. For details and a spreadsheet on MOSFET selection, refer to Applications Bulletin AB-8.
Some margin should be maintained away from both Lmin and Lmax. Adding margin by increasing L almost always adds expense since all the variables are predetermined by system performance except for CO, which must be increased to increase L. Adding margin by decreasing L can be done by purchasing capacitors with lower ESR. The RC5061 provides significant cost savings for the newer CPU systems that typically run at high supply current.
RC5061 Short Circuit Current Characteristics
The RC5061 protects against output short circuit on the core supply by turning off both the high-side and low-side MOSFETs and resetting softstart. The short circuit limit is set with the RS resistor, as given by the formula
RS = ISC *RDS, on IDetect
Inductor Selection
Choosing the value of the inductor is a tradeoff between allowable ripple voltage and required transient response. The system designer can choose any value within the allowed minimum to maximum range in order to either minimize ripple or maximize transient performance. The first order equation (close approximation) for minimum inductance is:
Lmin = (Vin - Vout) f x Vout Vin ESR x Vripple
with IDetect 50A, ISC is the desired current limit, and RDS,on the high-side MOSFET's on resistance. Remember to make the RS large enough to include the effects of initial tolerance and temperature variation on the MOSFET's RDS,on. Alternately, use of a sense resistor in series with the source of the MOSFET eliminates this source of inaccuracy in the current limit. The value of RS should be less than 8.3K. If a greater value is necessary, a lower RDS,on MOSFET should be used instead. As an example, Figure 4 shows the typical characteristic of the DC-DC converter circuit with an FDB6030L high-side MOSFET (RDS = 20m maximum at 25C * 1.25 at 75C = 25m) and a 8.2K RS.
CPU Output Voltage vs. Output Current 3.5 3.0
where: Vin = Input Power Supply Vout = Output Voltage f = DC/DC converter switching frequency ESR = Equivalent series resistance of all output capacitors in parallel Vripple = Maximum peak to peak output ripple voltage budget. The first order equation for maximum allowed inductance is:
Lmax = 2CO (Vin - Vout) Dm Vtb Ipp2
2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 0 5 10 15 20 25
Figure 4. RC5061 Short Circuit Characteristic
where: Co = The total output capacitance Ipp = Maximum to minimum load transient current Vtb = The output voltage tolerance budget allocated to load transient Dm = Maximum duty cycle for the DC/DC converter (usually 95%).
The converter exhibits a normal load regulation characteristic until the voltage across the MOSFET exceeds the internal short circuit threshold of 50A * 8.2K = 410mV, which occurs at 410mV/25m = 16.4A. (Note that this current limit level can be as high as 410mV/15m = 27A, if the MOSFET has typical RDS,on rather than maximum, and is at 25C). At this point, the internal comparator trips and signals the controller to discharge the softstart capacitor. This causes a drastic reduction in the output voltage as the load regulation collapses into the short circuit control mode. With a 40m output short,
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RC5061
PRODUCT SPECIFICATION
the voltage is reduced to 16.4A * 40m = 650mV. The output voltage does not return to its nominal value until the output current is reduced to a value within the safe operating ranges for the DC-DC converter. If any of the linear regulator outputs are loaded heavily enough that their output voltage drops below 80% of nominal for > 30sec, all RC5061 outputs, including the switcher, are shut off and remain off until power is recycled.
Schottky Diode Selection
The application circuit of Figure 1 shows a Schottky diode, D1, which is used as a free-wheeling diode to assure that the body-diode in Q2 does not conduct when the upper MOSFET is turning off and the lower MOSFET is turning on. It is undesirable for this diode to conduct because its high forward voltage drop and long reverse recovery time degrades efficiency, and so the Schottky provides a shunt path for the current. Since this time duration is very short, the selection criterion for the diode is that the forward voltage of the Schottky at the output current should be less than the forward voltage of the MOSFET's body diode.
It is necessary to have some low ESR aluminum electrolytic capacitors at the input to the converter. These capacitors deliver current when the high side MOSFET switches on. Figure 5 shows 3 x 1000F, but the exact number required will vary with the speed and type of the processor. For the top speed Katmai and Coppermine, the capacitors should be rated to take 9A and 6A of ripple current respectively. Capacitor ripple current rating is a function of temperature, and so the manufacturer should be contacted to find out the ripple current rating at the expected operational temperature. For details on the design of an input filter, refer to Applications Bulletin AB-15.
2.5H 5V 0.1F Vin 1000F, 10V Electrolytic
Figure 5. Input Filter
Active Droop
The RC5061 includes active droop; as the ouptut current increases, the output voltage drops. This is done in order to allow maximum headroom for transient response of the converter. The current is sensed by measuring the voltage across the high-side MOSFET during its on time. Note that this makes the droop dependent on the temperature of the MOSFET. However, when the formula given for selecting RS (current limit) is used, there is a maximum droop possible (-40mV), and when this value is reached, additional drop across the MOSFET will not cause any increase in droop--until current limit is reached. Additional droop can be added to the active droop using a discrete resistor (typically a PCB trace) outside the control loop, as shown in Figure 2. This is typically only required for the most demanding applications, such as for the next generation Intel processor (tolerance = +40/-70mV), as shown in Figure 2.
Output Filter Capacitors
The output bulk capacitors of a converter help determine its output ripple voltage and its transient response. It has already been seen in the section on selecting an inductor that the ESR helps set the minimum inductance, and the capacitance value helps set the maximum inductance. For most converters, however, the number of capacitors required is determined by the transient response and the output ripple voltage, and these are determined by the ESR and not the capacitance value. That is, in order to achieve the necessary ESR to meet the transient and ripple requirements, the capacitance value required is already very large. The most commonly used choice for output bulk capacitors is aluminum electrolytics, because of their low cost and low ESR. The only type of aluminum capacitor used should be those that have an ESR rated at 100kHz. Consult Application Bulletin AB-14 for detailed information on output capacitor selection. The output capacitance should also include a number of small value ceramic capacitors placed as close as possible to the processor; 0.1F and 0.01F are recommended values.
Remote Sense
The RC5061 offers remote sense of the output voltage to minimize the output capacitor requirements of the converter. It is highly recommended that the remote sense pin, Pin 16, be tied directly to the processor power pins, so that the effects of power plane impedance are eliminated. Further details on use of the remote sense feature of the RC5061 may be found in Applications Bulletin AB-24.
Input Filter
The DC-DC converter design may include an input inductor between the system +5V supply and the converter input as shown in Figure 5. This inductor serves to isolate the +5V supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5H is recommended.
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PRODUCT SPECIFICATION
RC5061
Adjusting the Linear Regulators' Output Voltages
Any or all of the linear regulators' outputs may be adjusted high to compensate for voltage drop along traces, as shown in Figure 6.
* Each VCC and GND pin should have its own via to the appropriate plane. This helps provide isolation between pins. * Place the MOSFETs, inductor, and Schottky as close together as possible for the same reasons as in the first bullet above. Place the input bulk capacitors as close to the drains of the high side MOSFETs as possible. In addition, placement of a 0.1F decoupling cap right on the drain of each high side MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter. * Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU will allow the parasitic resistance of the board traces to degrade the DC-DC converter's performance under severe load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5. * A PC Board Layout Checklist is available from Fairchild Applications. Ask for Application Bulletin AB-11.
VGATE VOUT R VFB 10K
Figure 6. Adjusting the Output Voltage of the Linear Regulator
The resistor value should be chosen as
R = 10K*
Vout Vnom
-1
Additional Information
For additional information contact Fairchild Semiconductor at http://www.fairchildsemi.com/cf/tsg.htm or contact an authorized representative in your area.
For example, to get the VTT voltage to be 1.55V instead of 1.50V, use R = 10K * [(1.55/1.50) - 1] = 333.
PCB Layout Guidelines
* Placement of the MOSFETs relative to the RC5061 is critical. Place the MOSFETs such that the trace length of the HIDRV and LODRV pins of the RC5061 to the FET gates is minimized. A long lead length on these pins will cause high amounts of ringing due to the inductance of the trace and the gate capacitance of the FET. This noise radiates throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress. * In general, all of the noisy switching lines should be kept away from the quiet analog section of the RC5061. That is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW, LODRV and VCCP) should be kept far away from the traces that connect to pins 3, 16 and 17. * Place the 0.1F decoupling capacitors as close to the RC5061 pins as possible. Extra lead length on these reduces their ability to suppress noise.
REV. 1.0.0 7/6/00
15
RC5061
PRODUCT SPECIFICATION
Appendix
Worst-Case Formulae for the Calculation of Cout, R7, and Cin (Circuit of Figure 1 only)
The following formulae design the RC5061 for worst-case operation, including initial tolerance and temperature dependence of all of the IC parameters (initial setpoint, reference tolerance and tempco, active droop tolerance, current sensor gain), the initial tolerance and temperature dependence of the MOSFET, and the ESR of the capacitors. The following information must be provided: VT+, the value of the positive transient voltage limit; |VT-|, the absolute value of the negative transient voltage limit; IO, the maximum output current; Vnom, the nominal output voltage; Vin, the input voltage (typically 5V); ESR, the ESR of the ouput caps, per cap (44m for the Sanyo parts shown in this datsheet); RD, the on-resistance of the MOSFET (10m for the FDB7030);
The value of R7 must be 8.3K. If a greater value is calculated, RD must be reduced. Number of capacitors needed fo Cout = the greater of:
ESR * IO VT-
X=
or
ESR * IO VT+ -0.004 * Vnom + 14400 * IO * RD 18 * R5 * 1.1
Y=
Example: Suppose that the transient limits are 134mV, current I is 14.2A, and the nominal voltage is 2.000V, using MOSFET current sensing and the usual caps. We have VT+ = |VT-| = 0.134, IO = 14.2, Vnom = 2.000, and RD = 0.67. We calculate:
2
2.000 14.2 * 5 Cin = 2
-
2.000 5
= 3.47 4 caps
R5 =
14.2 * 0.010 * (1 + 0.67) * 1.0 50 * 10-6 0.044 * 14.2
= 5.2K
RD, the tolerance of the current sensor (usually about 67% for MOSFET sensing, including temperature). Irms, the rms current rating of the input caps (2A for the sanyo parts shown in this datasheet.)
2 IO * Cin = Irms IO* RD * (1 + RD) * 1.10 50 * 10
-6
X=
= 4.66
0.134 0.044 * 14.2
Y= 0.134 - 0.004 * 2.000 + 14400 * 14.2 * 0.020 18 * 10400 * 1.1
= 4.28
Vnom Vin
-
Vnom Vin
R7 =
Since X > Y, we choose X, and round up to find we need 5 capacitors for COUT.
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PRODUCT SPECIFICATION
RC5061
Mechanical Dimension
20-Lead SOIC
Symbol A A1 B C D E e H h L N ccc
Inches Min. Max.
Millimeters Min. Max.
Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5 2 2 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals.
.093 .104 .004 .012 .013 .020 .009 .013 .496 .512 .291 .299 .050 BSC .394 .010 .016 20 0 -- 8 .004 .419 .029 .050
2.35 2.65 0.10 0.30 0.33 0.51 0.23 0.32 12.60 13.00 7.40 7.60 1.27 BSC 10.00 0.25 0.40 20 0 -- 8 0.10 10.65 0.75 1.27
3 6
20
11
E
H
1
10
D A e B A1 SEATING PLANE -C- LEAD COPLANARITY ccc C
h x 45 C
L
REV. 1.0.0 7/6/00
17
RC5061
PRODUCT SPECIFICATION
Ordering Information
Product Number RC5061M Package 20 pin SOIC
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
7/6/00 0.0m 003 Stock#DS30005061 2000 Fairchild Semiconductor Corporation

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